Reticle Limit

Computer chips aren’t assembled, they’re exposed. A machine projects the pattern of the future circuit onto a thin slice of silicon, much like a slide projector. The template for this pattern is called a reticle, or mask. This template has a fixed size, and so the projected image can’t be arbitrarily large either. In the most advanced machines, a single exposure step fits a rectangle of about 26 by 33 millimeters. That’s around 858 square millimeters, and this exact upper limit is called the reticle limit.

Why AI chips are hitting this wall

For a long time, the limit wasn’t a problem. A laptop processor measures 100 to 200 square millimeters and stays comfortably below it. For artificial intelligence chips, things look different. These chips compute with enormous number tables and need as many compute units as physically possible. Here, more area translates directly into more performance.

That’s why today’s large AI accelerators from Nvidia or AMD sit just below the reticle limit. They’re as large as the physics of the exposure machine will allow. Further growth isn’t possible, even though demand for compute power keeps rising every year. The limit is therefore one of the reasons why progress in AI hardware has become expensive and arduous.

On top of that comes an economic problem. The larger a chip, the more likely it is to be hit by a material defect on the silicon wafer. With a tiny chip, you throw away a few cents; with a chip near the reticle limit, you throw away several thousand euros. Large chips are thus not only hard to manufacture, but also disproportionately expensive.

Where the 858 square millimeters come from

The culprit is the optics of the exposure machine. The light has to pass through a lens system that projects the mask’s pattern onto the silicon at a strongly reduced scale. This lens system can only render a limited image area in sharp focus. At the edges, the image would become blurry, and with structures just a few nanometers wide, that would render the chip unusable.

You can picture this like a projector that’s only pin-sharp in the center of the image. Instead of stretching the image larger, you shift the screen and project the next field right next to it. That’s exactly how the machines work: they expose field after field across the entire wafer. Each field is one chip, and none may be larger than the optics' field of view.

The way out is called advanced packaging. Here, several smaller chips are manufactured individually and then placed tightly next to each other on a shared carrier substrate. These sub-components are called chiplets. In operation, they behave almost like a single large chip, even though each one individually stayed below the reticle limit. It’s not entirely equivalent, though, since the connections between chiplets are slower than the wiring within a single chip.

The term in product announcements and stock market news

When a manufacturer unveils new AI hardware, the phrase often comes up almost verbatim: the chip is said to be reticle-limited, meaning it’s at the edge of what’s feasible. Nvidia’s Blackwell generation, for instance, consists of two chips at this limit that were joined into a single unit. Such phrasing is marketing, but it describes a genuine physical fact.

The limit also comes up in stock analyses. It explains why companies like TSMC, which have mastered this packaging technology, have become so important. If you can’t assemble chiplets, you can’t deliver cutting-edge AI chips. Packaging bottlenecks have repeatedly determined delivery times for AI accelerators in recent years.

A common misconception is that the reticle limit is a fixed constant of nature. It depends on the design of the machines and has already been changed in the past. Newer systems with so-called High-NA optics deliver sharper structures, but in exchange cut the exposable field in half. So the limit doesn’t necessarily grow larger — it shifts anew with each generation of equipment.