N3P process

Computer chips are manufactured in large factories, and each factory masters certain manufacturing techniques. Such a technique is called a process or node in the industry. N3P is the name of one such process used by the Taiwanese contract manufacturer TSMC, the world’s largest group of chip fabs. The N stands for nanometer, a unit of length: one nanometer is one millionth of a millimeter. The 3 refers to the so-called 3-nanometer generation, and the P stands for Performance. N3P is thus the third, improved development stage within this generation and has been used for mass-produced products since 2024.

What a better node means for phones and data centers

Chips consist of transistors, tiny electrical switches. The smaller and more efficient these switches are, the more of them fit on the same area. And the less power they consume for the same computing work. TSMC states that N3P offers about five percent more speed compared to the previous stage N3E at the same power consumption, or alternatively about ten percent less consumption at the same speed.

That may sound like little, but it is economically enormous. In a smartphone, lower consumption means longer battery life without a bigger battery. In a data center with tens of thousands of chips, ten percent adds up to millions of dollars on the electricity bill. That is exactly why Apple, Nvidia, AMD, and Qualcomm compete for the limited manufacturing capacity of the newest nodes.

A common misconception: the number in the name is no longer a physical measurement. No component in a 3-nanometer chip is actually three nanometers in size. Today, the designation is more of a marketing name for a generation. Comparisons between manufacturers based on the number alone are therefore not very meaningful.

Exposure, transistor shape, and the limits of shrinking

Chips are created layer by layer on round silicon discs, the wafers. Patterns are projected with light onto a light-sensitive layer, similar to photography. The exposed areas are then etched away or filled with metal. For the finest structures, TSMC uses extremely short-wavelength light, called EUV. This light has such a short wavelength that it is absorbed by ordinary glass and can only be directed using mirrors inside a vacuum chamber.

N3P is not an entirely new design, but a fine-tuning. The transistors still use the FinFET design, in which the switching channel rises from the surface like a narrow fin. What was improved were the materials used, the precise geometry, and the exposure steps. Experts refer to such intermediate stages as an optical shrink or a refinement.

An important advantage: N3P is compatible with N3E in terms of design rules. A chip design created for N3E can be moved to N3P with little effort. This saves development time, since a complete chip design can quickly cost hundreds of millions of dollars.

N3P in products and in quarterly results

In practice, you encounter N3P mainly in devices, without it being labeled as such. Apple manufactures processors for iPhones and Macs at TSMC within the 3-nanometer family. Graphics and AI accelerators from Nvidia and AMD, as well as phone chips from Qualcomm and MediaTek, also come from these nodes. The chip designer places the order, TSMC does the production.

The term appears in business news when it comes to revenue and capacity. TSMC regularly discloses what share of its revenue comes from 3-nanometer manufacturing. If this share rises, it is seen on the stock market as a good sign, because modern nodes command higher prices. News about successors such as N2, the first 2-nanometer generation with a new transistor design, also falls into this kind of reporting.

Important for context: N3P is not a product you can buy. It is a manufacturing process, comparable to a particularly precise printing house. The printing house doesn’t write the books itself, it only produces its customers' templates. So reading about N3P means reading about the manufacturing stage behind devices, not about the devices themselves.