2-nanometer manufacturing

A computer chip consists of billions of tiny switches that let electricity through or block it. These switches are called transistors, and all computing power is built from them. The smaller a manufacturer can build them, the more fit on the same area. 2-nanometer manufacturing refers to the currently most advanced generation of these production processes. A nanometer is a millionth of a millimeter, roughly the width of five atoms side by side. But here’s the important part: in a 2-nanometer chip, not a single component actually measures two nanometers. The name is an industry label for a technology tier, not a measured value.

Why every new chip generation raises the question of power

Smaller transistors bring two advantages at once. They switch faster, and they need less electricity per computing step. For a smartphone, that means more performance with longer battery life. For a data center, it means lower electricity bills for the same amount of work. Manufacturers promise roughly 10 to 15 percent more speed or about a quarter less power consumption for the jump from 3 to 2 nanometers.

These numbers sound modest, but they are economically enormous. Anyone training AI models operates tens of thousands of chips over months at a time. A quarter less power there can decide millions of dollars. That’s why companies like Apple, Nvidia, or Google often buy up the capacity of new production lines years in advance.

On top of that comes the political dimension. Only very few companies worldwide master this manufacturing tier at all, first and foremost TSMC in Taiwan, along with Samsung in South Korea and Intel in the United States. A single factory costs a good 20 billion dollars. This concentration is the reason why chip factories regularly appear in political news and not just in tech magazines.

From beam of light to gate-all-around transistor

Chips are created like an extremely fine photographic print. A round silicon wafer is coated with a light-sensitive layer. A pattern is exposed onto it through a mask, and afterward the exposed areas are etched away. This cycle repeats hundreds of times and builds up the chip layer by layer. For the finest structures, extreme ultraviolet light, called EUV for short, is used, which only a single company in the Netherlands can supply.

But the real leap at 2 nanometers lies in the shape of the transistors. Previously, the control contact, the so-called gate, sat like a rider on three sides of a silicon fin. Now it encloses the current channel on all four sides. This principle is called gate-all-around. You can picture it like a fist that grips a hose completely instead of just pressing it from above — this makes control over the flow noticeably better.

This control is crucial because at such sizes, current leaks through closed switches. Physicists call this leakage current. It wastes energy and generates heat. Gate-all-around suppresses this loss and is what makes the structure operable at all.

Where 2-nanometer chips show up first

New manufacturing tiers almost always start in flagship smartphones. The chips there are small, the unit numbers high, and customers willingly pay a premium. Next come processors for laptops, and finally the large computing accelerators for AI data centers. The first products using 2-nanometer technology came onto the market starting in 2025.

In business news, you mostly encounter the term via yield. It indicates how many chips on a wafer are usable. At the start of a new generation, it’s often below half, which drives prices up. Reports of rising yield at TSMC therefore regularly move stock prices.

A common misconception is that smaller nanometer figures from different manufacturers are directly comparable. They are not, because each company counts differently. Samsung’s 3 nanometers and TSMC’s 3 nanometers describe chips of different density. The only meaningful measure is the number of transistors per square millimeter.