3-Nanometer Manufacturing

A computer chip is a thin slice of silicon into which tiny electrical switches are built. These switches are called transistors, and a modern chip contains tens of billions of them. The smaller they are built, the more fit on the same surface area. 3-nanometer manufacturing is currently the most advanced generation of these manufacturing processes. A nanometer is a millionth of a millimeter; a human hair is roughly 50,000 nanometers thick. What matters, though, is this: in such a chip, hardly any component actually measures three nanometers. The number is a name for a technology generation, not a measured value.

Why a few nanometers decide billion-dollar markets

Smaller transistors bring two advantages at once. First, more of them fit on a chip, so computing power increases. Second, each individual switch has to move less electrical current, so power consumption drops. That’s why a new smartphone lasts longer on a charge while still computing faster.

For data centers, power consumption is actually the more important point. AI models run on thousands of chips simultaneously, and the electricity bill is a large part of the operating costs. A manufacturing step that saves 20 to 30 percent in energy changes the economics of entire business models.

On top of that comes the political dimension. Only very few companies worldwide master 3-nanometer manufacturing, above all TSMC in Taiwan and Samsung in South Korea. The machines required for it come almost exclusively from the Dutch manufacturer ASML. This dependence on a handful of locations is one reason chips regularly show up in trade conflicts.

Exposing, etching, repeating

Chips are not created by assembly, but by printing in layers. A light-sensitive coating of photoresist is applied to a silicon wafer. A pattern is then projected onto it, similar to a slide projector, only massively shrunk down. Wherever light hits, the resist can be washed away, and the exposed areas are then etched away or filled with metal. This process repeats for more than a hundred layers.

For patterns this fine, ordinary light is no longer sufficient. 3-nanometer manufacturing uses extreme ultraviolet light, EUV for short, with a very short wavelength. It is generated by vaporizing tiny droplets of tin with a laser. A single such machine costs well over 150 million euros.

In addition, the design of the transistors themselves changed. At Samsung, and partly at TSMC, the control electrode now surrounds the current channel from all four sides. Experts call this Gate-All-Around. This allows the switch to close more tightly, letting less current leak through unintentionally. This very leakage is the main reason why further shrinking has become so difficult.

3 nanometers in products and headlines

Anyone who owns a current flagship smartphone very likely carries a 3-nanometer chip in their pocket. Apple was the first major customer in 2023 with the A17 Pro. Newer laptop processors and graphics chips for AI data centers also use this generation. In practice, you notice nothing about this directly—only in battery life and speed.

In business news, the term usually comes up in three contexts: in TSMC’s quarterly results, in export restrictions targeting China, and in subsidy programs for new factories in Europe and the United States. Such a factory can easily cost 20 billion dollars.

A common misconception is that the numbers from different manufacturers are comparable. A 3-nanometer process from Samsung does not technically correspond exactly to one from TSMC. A more meaningful comparison is transistor density, that is, how many switches fit per square millimeter of space. The next generations are already called 2 nanometers and below, yet pure shrinking is slowly running up against physical limits.