Nanosheet

A computer chip consists of billions of tiny electrical switches. Each of these switches, called a transistor, either lets current through or blocks it — this is how the zeros and ones of every computation arise. A nanosheet is a particular design of such a switch. Current flows through several extremely thin silicon ribbons stacked on top of one another, each only a few atomic layers thick. A control element completely surrounds each of these ribbons from all four sides. The name comes from this shape: a tiny sheet on the nanometer scale, meaning a millionth of a millimeter.

Why chips stopped getting smaller without nanosheets

For decades, transistors have kept getting smaller. Smaller means more computing power in the same area and less energy consumed per computing step. Recently, however, this miniaturization hit a physical limit. In very short switches, the control element was no longer able to cleanly switch off the current.

The result is called leakage current: the transistor leaks even though it is supposed to be off. Multiplied by billions, this adds up to heat and wasted energy. This is exactly where the nanosheet design helps. Because the control element wraps all the way around the silicon ribbon, it has much greater control over the flow of current. This allows the switches to be shrunk further without becoming leaky.

For the chip industry, this is a multi-billion-dollar issue. Whoever first masters nanosheet manufacturing reliably builds the fastest processors for smartphones, data centers, and AI systems. The competition between TSMC from Taiwan, Samsung from South Korea, and Intel from the United States currently centers on this very design.

From the fin to the stacked ribbon

Until around 2011, transistors were built flat. The control element, called the gate, sat like a lid on top of the channel through which current flows. It could therefore only act from one side. After that came the FinFET: the channel was raised up as a narrow ridge, and the gate wrapped around it from three sides. The English word “fin” refers to a fish fin or similar structure.

The nanosheet takes this a step further. The channel is no longer a vertical ridge but a flat, horizontal ribbon. Several of these are stacked on top of each other, usually three or four. The gate material is grown in between the ribbons and completely surrounds each one. This all-around control is known in technical jargon as Gate-All-Around, abbreviated GAA.

Manufacturing is delicate. First, a stack of alternating layers of silicon and a silicon-germanium alloy is grown. The alloy is then chemically etched away, so that the silicon ribbons hang freely in the air. Only then is the gap filled with the gate material. One advantage over the FinFET: the width of the ribbons can be adjusted. Wider ribbons switch more current and thus operate faster, while narrower ones save energy.

Where the design shows up in products and headlines

Nanosheets are found in the most advanced manufacturing nodes, which are labeled in nanometers — such as 2 nm or Intel’s 18A. However, these numbers are merely marketing names for a manufacturing generation and not an actual measured length. Samsung already introduced the technology starting with its 3 nm node, and TSMC and Intel followed with their 2 nm generations.

In everyday life, you encounter the result, not the term. Smartphone chips from model years starting in 2025 and processors for laptops contain such transistors. They are especially important for AI data centers, because power consumption has now become the largest ongoing cost item there.

In business news, nanosheet usually comes up in connection with yield. Yield refers to the proportion of working chips per manufactured silicon wafer. Low yield with a new design can delay product launches and move stock prices. The so-called forksheet or the CFET, in which two transistor types are stacked on top of each other, is already considered its successor.