Gate-all-around

Every computer chip consists of billions of tiny switches, called transistors. A transistor has a channel through which current can flow, and a control electrode that switches this flow on and off. This control electrode is called the gate. In the gate-all-around design, the gate surrounds the channel from all sides, instead of only touching it from above or from three sides. The channel then sits inside the gate like an electrical wire inside its insulation. The English name means exactly that: gate all around.

Why chips can’t get smaller without this design

Chip manufacturers have been shrinking their transistors further and further for decades. Smaller switches mean more computing power per area and lower power consumption. But the shorter the channel becomes, the harder it is for the gate to truly seal it off. Current then leaks through even in the switched-off state. Experts call this leakage current.

Leakage currents are not a minor nuisance but a hard limit. They consume energy without computing anything, and they generate waste heat. A smartphone battery drains faster as a result, and a data center needs more cooling. Beyond a certain size, further shrinking without better control accomplishes nothing at all.

Gate-all-around gives the industry breathing room here again. Because the gate completely encloses the channel, it controls it much better. The transistor switches off cleanly at a lower voltage. Without this step, manufacturing nodes like 2 nanometers would hardly have been feasible.

From the fin to the stacked nanosheet

The earliest transistors were flat: the channel lay as a thin layer on the silicon surface, with the gate sitting only on top of it. Around 2011, the industry switched to the FinFET. Here the channel stands upright as a narrow fin, and the gate surrounds it from three sides. The underside, however, remains connected to the chip and thus uncontrolled.

Gate-all-around takes the final step. The channel is manufactured as a freely suspended ribbon, known as a nanosheet. It is only a few atomic layers thick. The gate material is then deposited all around it, including underneath the ribbon. This way, there is no longer any uncontrolled side.

Typically, several such ribbons are stacked on top of one another, often two to four. Each contributes to the current flow without the transistor taking up more base area. The width of the ribbons can also be adjusted: wider ribbons deliver more performance, narrower ones save power. With the FinFET design, this was only possible in coarse steps, since only whole fins could be added.

2-nanometer chips in news and products

Samsung was the first manufacturer to start mass production with gate-all-around in 2022. TSMC, the world’s largest contract manufacturer, followed with its 2-nanometer generation. Intel uses the same basic idea under the brand name RibbonFET. Whenever business news mentions 2-nanometer chips, this design is practically always behind it.

You never get to see such a transistor directly. It sits inside the processors of smartphones, laptops, and above all in accelerator chips for artificial intelligence. Especially there, every watt saved counts, because data centers consume enormous amounts of electricity.

A common misconception: the figure of 2 nanometers does not describe an actually measured length within the chip. Today it is a marketing name for a manufacturing generation. The real components are larger. More meaningful metrics are figures such as transistors per square millimeter or power consumption at equal computing performance.