WSE-3 Turbo
#3 in AI Training HardwareCerebras · v3 · turbo · 2× · last seen Aug 20, 2026
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Momentum
The WSE-3 Turbo (WSE-3T) is a Wafer-Scale AI processor developed by Cerebras Systems, unveiled on August 18, 2026, as the core component of the new CS-4 Rack system. The chip is based on the WSE-3 architecture introduced in 2024, but operates at significantly higher clock speeds, delivering approximately double the compute performance and memory bandwidth of its predecessor. Three WSE-3 Turbo wafers are combined in each CS-4 Rack of the new Nexus platform architecture; an official list price has not yet been published.
Momentum trend
22.05.20.08.
Features
| Manufacturing Process (nm) | TSMC 5nm process (N5), 46,225 mm² wafer area, 4 trillion transistors, 900,000 cores |
| Platform | Cerebras Nexus Platform Architecture, basis of the CS-4 system (3 WSE-3 Turbo wafers per rack) |
| Compute Performance (FLOPS/TOPS) | 250 PFLOPS (sparse FP16) per wafer; 750 PFLOPS per CS-4 rack (3 wafers) |
| Release Date | Announced August 18, 2026; first CS-4 system shipments in Q3 2026 |
| Memory | 44 GB on-wafer SRAM; 43.2 PB/s memory bandwidth per wafer (129.6 PB/s per CS-4 rack) |
| Availability | First CS-4 shipments scheduled this quarter (Q3 2026); pricing, production volume and customer capacity not disclosed |
